mirror of
https://github.com/diodeinc/pcb.git
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Akhil Velagapudi
4413c9d4d9
* Hydrate V2 deps during migrate * Fix mixed hydrated package resolution * Simplify workspace discovery * Clean up workspace package discovery naming * Update stdlib formatting paths
65 lines
1.6 KiB
Python
65 lines
1.6 KiB
Python
"""Test for SPICE model of TVS diode - demonstrates clamping behavior."""
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load("../../interfaces.zen", "Ground", "Power")
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load("../../units.zen", "Voltage")
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load("../../properties.zen", "Simulation")
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Tvs = Module("../../generics/Tvs.zen")
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Resistor = Module("../../generics/Resistor.zen")
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VIN = Power()
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PROBE = Power(voltage=Voltage("5V"))
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GND = Ground()
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# Unidirectional TVS diode for 5V rail protection
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Tvs(
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name="D1",
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package="DO-219AB",
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direction="Unidirectional",
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reverse_standoff_voltage="5 to 6V",
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A=GND,
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K=PROBE,
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)
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# Series resistor to limit current
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Resistor(
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name="R1",
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value="100Ohm",
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package="0603",
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P1=VIN,
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P2=PROBE,
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)
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Simulation(
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name="test_Tvs",
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setup=f"""
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# Test TVS diode SPICE model - voltage clamping behavior
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V1 {VIN} {GND} DC 0
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.control
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dc V1 0 15 0.05
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* Measure probe voltage at key points
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meas dc vprobe_low find v({PROBE}) at=3
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meas dc vprobe_clamp find v({PROBE}) at=12
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* Below breakdown: probe should track input closely (3V in, ~3V out)
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if vprobe_low < 2.5 or vprobe_low > 3.5
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echo "FAIL: below breakdown expected ~3V passthrough, got $&vprobe_low"
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quit 1
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end
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* Above breakdown: probe should be clamped well below input (12V in, <8V out)
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if vprobe_clamp > 8
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echo "FAIL: above breakdown expected clamping, got $&vprobe_clamp at 12V input"
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quit 1
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end
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echo "PASS: V_probe(3V)=$&vprobe_low V_probe(12V)=$&vprobe_clamp"
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set hcopydevtype = svg
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hardcopy output/tvs_clamping.svg v({VIN}) v({PROBE}) title "TVS Diode Clamping" xlabel "Input Voltage" ylabel Voltage
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.endc
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""",
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)
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