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https://github.com/diodeinc/pcb.git
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Akhil Velagapudi
4413c9d4d9
* Hydrate V2 deps during migrate * Fix mixed hydrated package resolution * Simplify workspace discovery * Clean up workspace package discovery naming * Update stdlib formatting paths
23 lines
646 B
Plaintext
23 lines
646 B
Plaintext
* Capacitor SPICE subcircuit
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* Series RLC model capturing parasitic ESR and ESL
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*
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* Equivalent circuit:
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*
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* 1 ── ESL ── ESR ── C ── 2
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*
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* Behavior:
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* f < SRF: Impedance dominated by C (capacitive, |Z| falls with f)
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* f = SRF: Impedance minimum at ESR (series resonance of C and ESL)
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* f > SRF: Impedance dominated by ESL (inductive, |Z| rises with f)
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*
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* Parameters:
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* CVAL - Capacitance value in farads
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* ESR - Equivalent series resistance (ohms)
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* ESL - Equivalent series inductance (henries)
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.SUBCKT C 1 2 PARAMS: CVAL=100n ESR=10m ESL=500p
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L_esl 1 mid1 {ESL}
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R_esr mid1 mid2 {ESR}
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C1 mid2 2 {CVAL}
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.ENDS C
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