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Lenny Khazan
aebd53ce61
* port changes from main repo * persist sch position * Update tests * remove unused
24 lines
344 B
Plaintext
24 lines
344 B
Plaintext
load("@stdlib/properties.zen", "Layout")
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Resistor = Module("@stdlib/generics/Resistor.zen")
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P1 = Net("P1")
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P2 = Net("P2")
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Resistor(
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name = "R1",
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value = "1kohm",
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package = "0603",
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P1 = P1,
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P2 = P2,
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)
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Resistor(
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name = "R2",
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value = "1kohm",
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package = "0603",
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P1 = P1,
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P2 = P2,
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)
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Layout(name = "Module", path = "module/") |